This application relates to subject matter that may be similar to application Ser. No. 12/890,146 filed Sep. 24, 2010, the entirety of which is hereby incorporated by reference.
As known in the art, a plurality of production IC die are formed on a semiconductor wafer by performing semiconductor processing including lithography, etch, ion implant and thin film processes. Following formation of the IC die, the wafer is sawed for singulation of the die. The wafer spaces between the IC die used for sawing the wafer are referred to as scribe line areas.
To assess electrical properties of elements (e.g., MOS transistors) constituting an IC die, a predetermined pattern of measuring elements or test elements (called test modules) are formed in the scribe line areas of the wafer to allow generation of in-line (i.e. production) test data. The test module is electrically tested by a test system including a probe card, prober system and measurement apparatus, and testing can be performed after deposition of an early metal interconnect level (e.g., first metal level) or after completion of wafer processing, for determining whether circuit elements such as MOS devices are suitably formed (e.g., have proper threshold voltage and breakdown voltage) in the IC die formed on the wafer. Since the test module is formed using the same process as the process for forming the circuit elements formed on the IC die, and often having the same device layout, testing electrical properties of the devices in the test module can be identical to testing electrical properties of the circuit elements formed in the production IC die. Accordingly, the properties of the IC die can generally be accurately deduced by testing the test modules.
Conventional scribe line test modules, particularly for analog and mixed signal technologies, have significant constraints on both wafer scribe line area and scribe test time given the extensive component count and electrical tests needed to properly characterize the die circuitry. A standard 1×16 (1 pin wide, 16 pins long) test module can accommodate up to four MOS devices, with a separate pin used for each of the MOS sources, gates, drains, and substrate/body terminals. Other scribe line test modules use a multiplex arrangement that raises the number of placed devices per pin in the test module, to achieve more placed devices than the number of test pins.